cystech electronics corp. spec. no. : c101dfa6 issued date : 2018.05.03 revised date : page no. : 1/10 mta050b01dfa6 cystek product specification dual p-channel enhancement mode mosfet mta050b01dfa6 features ? simple drive requirement ? low gate charge ? low on-resistance ? fast switching speed ? pb-free lead plating and halogen-free package equivalent circuit outline ordering information device package shipping MTA050B01DFA6-0-T1-G dfn2 2-6l (pb-free lead plating and halogen-free package) 3000 pcs / tape & reel mta050b01dfa6 dfn2 2-6l g gate s source d drain bv dss -14v i d @v gs =-4.5 v, t a =25 c -4.3a r dson @v gs =-4.5v, i d =-3.6a 39m ( typ .) r dson @v gs =-2.5v, i d =-3.2a 55m ( typ .) r dson @v gs =-1.8v, i d =-1.0a 69m ( typ .) environment friendly grade : s for rohs compliant products, g for rohs compliant and green compound products packing spec, t1 : 3000 pcs / tape & reel, 7? reel product rank, zero for no rank products product name
cystech electronics corp. spec. no. : c101dfa6 issued date : 2018.05.03 revised date : page no. : 2/10 mta050b01dfa6 cystek product specification absolute maximum ratings (ta=25 c) parameter symbol limits unit drain-source breakdown voltage bv dss -14 gate-source voltage v gs 8 v continuous drain current @t a =25 c, v gs =-4.5v (note 1) -4.3 continuous drain current @t a =70 c, v gs =-4.5v (note 1) i d -3.4 pulsed drain current (note 2) i dm -26 a p d 1.38 w total power dissipation (note 1) linear derating factor 0.01 w / c operating junction and storage temperature tj, tstg -55~+150 c note : 1.surface mounted on 1 in2 copper pad of fr-4 board, t 5 sec 2. pulse width limited by maximum junction temperature thermal data parameter symbol value unit thermal resistance, junction-to-case, max r jc 75 thermal resistance, junction-to-ambient, max r ja 90 (note ) c/w note :.surface mounted on 1 in2 copper pad of fr-4 board, t 5 sec; 195 c/w when mounted on minimum copper pad electrical characteristics (tj=25 c, unless otherwise specified) symbol min. typ. max. unit test conditions static bv dss -14 - - v v gs =0v, i d =-250 a ? bv dss / ? tj - -5 - mv/ c reference to 25 c, i d =-250 a v gs(th) - -0.8 -1.2 v v ds =v gs , i d =-250 a i gss - - 100 na v gs =8v, v ds =0v - - -1 v ds =-12v, v gs =0v i dss - - -25 a v ds =-12v, v gs =0v, tj=70 c - 39 55 v gs =-4.5v, i d =-3.6a - 55 77 v gs =-2.5v, i d =-3.2a *r ds(on) - 69 - m v gs =-1.8v, i d =-1.0a *g fs - 7.4 - s v ds =-5v, i d =-3a dynamic ciss - 678 - coss - 130 - crss - 123 - pf v ds =-10v, v gs =0v, f=1mhz *t d(on) - 11.6 - *t r - 22.8 - *t d(off) - 56 - *t f - 33.2 - ns v ds =-10v, i d =-1a, v gs =-4.5v, r g =6
cystech electronics corp. spec. no. : c101dfa6 issued date : 2018.05.03 revised date : page no. : 3/10 mta050b01dfa6 cystek product specification *qg - 8.8 - *qgs - 0.9 - *qgd - 2.7 - nc v ds =-10v, i d =-1.5a, v gs =-4.5v rg - 15 - f=1mhz source-drain diode *v sd - -0.9 -1.2 v v gs =0v, i s =-3.4a *trr - 24.7 - ns *qrr - 4.8 - nc i f =-3.4a, v gs =0v, di f /dt=100a/ s *pulse test : pulse width 300 s, duty cycle 2% recommended soldering footprint
cystech electronics corp. spec. no. : c101dfa6 issued date : 2018.05.03 revised date : page no. : 4/10 mta050b01dfa6 cystek product specification typical characteristics typical output characteristics 0 4 8 12 16 20 012345 -v ds , drain-source voltage(v) -i d , drain current (a) -v gs =2v -v gs =8v,7v,6v,5v,4v,3v,2.5v - brekdown voltage vs ambient temperature 0.4 0.6 0.8 1 1.2 1.4 1.6 -75 -50 -25 0 25 50 75 100 125 150 175 tj, junction temperature(c) -bv dss , normalized drain-source breakdown voltage i d =-250 a, v gs =0v static drain-source on-state resistance vs drain current 10 100 1000 0.01 0.1 1 10 -i d , drain current(a) r ds(on) , static drain-source on-state resistance(m) v gs =-1.8v v gs =-2.5v v gs =-4.5v reverse drain current vs source-drain voltage 0.2 0.4 0.6 0.8 1 1.2 0246810 -i dr , reverse drain current (a) -v sd , source-drain voltage(v) tj=25c tj=150c v gs =0v static drain-source on-state resistance vs gate-source voltage 0 50 100 150 200 250 300 012345 -v gs , gate-source voltage(v) r ds(on) , static drain-source on- state resistance(m) i d =-3.6a drain-source on-state resistance vs junction tempearture 0.4 0.6 0.8 1 1.2 1.4 1.6 -75 -50 -25 0 25 50 75 100 125 150 175 tj, junction temperature(c) r ds(on) , normalized static drain- source on-state resistance v gs =-4.5v, i d =-3.6a r ds( on) @tj=25c : 39m typ.
cystech electronics corp. spec. no. : c101dfa6 issued date : 2018.05.03 revised date : page no. : 5/10 mta050b01dfa6 cystek product specification typical characteristics(cont.) capacitance vs drain-to-source voltage 100 1000 10000 012345678910 -v ds , drain-source voltage(v) capacitance---(pf) c oss ciss crss threshold voltage vs junction tempearture 0.4 0.6 0.8 1 1.2 1.4 -75 -50 -25 0 25 50 75 100 125 150 175 tj, junction temperature(c) -v gs(th) ,normalized threshold voltage i d =-250 a i d =-1ma single pulse power rating, junction to ambient 0 10 20 30 40 50 0.001 0.01 0.1 1 10 100 pulse width(s) power (w) t j(max) =150c t a =25c r ja =90c/w gate charge characteristics 0 1 2 3 4 5 6 7 8 02468101214161820 qg, total gate charge(nc) -v gs , gate-source voltage(v) v ds =-10v i d =-1.5a maximum safe operating area 0.01 0.1 1 10 100 0.01 0.1 1 10 100 -v ds , drain-source voltage(v) -i d , drain current (a) dc 10ms 100ms 1ms 100 s r ds( on) limited t a =25c, tj=150c, v gs =-4.5v, r ja =90c/w single pulse maximum drain current vs junctiontemperature 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 25 50 75 100 125 150 175 tj, junction temperature(c) -i d , maximum drain current(a) t a =25c, v gs =-4.5v, r ja =90c/w
cystech electronics corp. spec. no. : c101dfa6 issued date : 2018.05.03 revised date : page no. : 6/10 mta050b01dfa6 cystek product specification typical characteristics(cont.) typical transfer characteristics 0 4 8 12 16 20 012345 v gs , gate-source voltage(v) i d , drain current(a) v ds =5v forward transfer admittance vs drain current 0.01 0.1 1 10 0.001 0.01 0.1 1 10 -i d , drain current(a) g fs , forward transfer admittance-(s) v ds =-5v pulsed ta=25c transient thermal response curves 0.001 0.01 0.1 1 1.e-04 1.e-03 1.e-02 1.e-01 1.e+00 1.e+01 1.e+02 1.e+03 t 1 , square wave pulse duration(s) r(t), normalized transient thermal resistance single pulse 0.01 0.02 0.05 0.1 0.2 d=0.5 1.r ja (t)=r(t)*r ja 2.duty factor, d=t 1 /t 2 3.t jm -t a =p dm *r ja (t) 4.r ja = 90c/w
cystech electronics corp. spec. no. : c101dfa6 issued date : 2018.05.03 revised date : page no. : 7/10 mta050b01dfa6 cystek product specification reel dimension
cystech electronics corp. spec. no. : c101dfa6 issued date : 2018.05.03 revised date : page no. : 8/10 mta050b01dfa6 cystek product specification carrier tape dimension
cystech electronics corp. spec. no. : c101dfa6 issued date : 2018.05.03 revised date : page no. : 9/10 mta050b01dfa6 cystek product specification recommended wave soldering condition product peak temperature soldering time pb-free devices 260 +0/-5 c 5 +1/-1 seconds recommended temperature profile for ir reflow profile feature sn-pb eutectic assembly pb-free assembly average ramp-up rate (tsmax to tp) 3 c/second max. 3 c/second max. preheat ? temperature min(t s min) ? temperature max(t s max) ? time(ts min to ts max ) 100 c 150 c 60-120 seconds 150 c 200 c 60-180 seconds time maintained above: ? temperature (t l ) ? time (t l ) 183 c 60-150 seconds 217 c 60-150 seconds peak temperature(t p ) 240 +0/-5 c 260 +0/-5 c time within 5 c of actual peak temperature(tp) 10-30 seconds 20-40 seconds ramp down rate 6 c/second max. 6 c/second max. time 25 c to peak temperature 6 minutes max. 8 minutes max. note : all temperatures refer to topside of the package, measured on the package body surface.
cystech electronics corp. spec. no. : c101dfa6 issued date : 2018.05.03 revised date : page no. : 10/10 mta050b01dfa6 cystek product specification dfn2 2-6l dimension millimeters inches millimeters inches dim min. max. min. max. dim min. max. min. max. a 0.700 0.800 0.028 0.031 e1 0.520 0.720 0.020 0.028 a1 0.000 0.050 0.000 0.002 k 0.200 - 0.008 - a3 0.203 ref 0.008 ref b 0.250 0.350 0.010 0.014 d 1.900 2.100 0.075 0.083 e 0.650 typ 0.026 typ e 1.900 2.100 0.075 0.083 l 0.200 0.300 0.008 0.012 d1 0.900 1.100 0.035 0.043 notes : 1.controlling dimension : millimeters. 2.maximum lead thickness includes lead finish thickness, and minimum lead thickness is the minimum thickness of base material. 3.if there is any question with packing spec ification or packing method, please cont act your local cystek sales office. material : ? lead :pure tin plated. ? mold compound : epoxy resin family, flammability solid burning class:ul94v-0. important notice: ? all rights are reserved. reproduction in whole or in part is prohibited without the prior written approval of cystek. ? cystek reserves the right to make changes to its products without notice. ? cystek semiconductor products are not warranted to be suitab le for use in life-support applications, or systems. ? cystek assumes no liability for any consequence of customer pr oduct design, infringement of pat ents, or application assistance . marking: 6-lead dfn2 2-6l plastic surface mounted package cystek package code: dfa6 style: pin 1. source1 (s1) pin 2. gate 1 (g1) pin 3. drain2 (d2) pin 4. source2 (s2) pin 5. gate2 (g2) pin 6. drain1 (d1) device code date code a5tb
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